Bio-inspired Neuromorphic Computing

Spiking Neural Network (SNN) has been attracting significant attention in the fields of neuromorphic computing and artificial intelligence, as it promises excellent fault tolerance, high energy efficiency and fast on-line learning. This is due to its unique brain-inspired properties including high parallelism, event-driven processing, spike-based information coding and local learning rules. Because SNN is more biologically plausible than conventional Artificial Neural Network (ANN) by mimicking biological neural network much more closely, SNN has been used to study and understand mammal brains, and also been applied in many Artificial Intelligent (AI) applications, such as image classification, language and speech recognition, and autonomous robot applications.

After I joined the Research Lab of Ultra Low-Power and Intelligent Integrated Circuits in HUST, I started the study of Neural Network Based Neuromorphic Computing and High Energy Efficient Chip Design, supervised by Prof. Chao Wang. Spiking Neural Network (SNN) has been attracting significant attention in the fields of neuromorphic computing and artificial intelligence, as it promises excellent fault tolerance, high energy efficiency and fast on-line learning. During this near-1-year research, I developed a basic understanding of SNN and built several software simulation platforms.

I proposed a novel SNN design employing fast COordinate Rotation DIgital Computer (CORDIC) algorithm to achieve fast spike timing–dependent plasticity (STDP) learning with high hardware efficiency. In this study, a system design and evaluation method of CORDIC-based SNN is proposed for finding optimal CORDIC type and precision, from theoretical CORDIC-level error, synapse/neuron model level numerical accuracy, to application-level learning performance. From the proposed design and evaluation method, a reconfigurable SNN design based on fast-convergence CORDIC is designed to achieve high classification accuracy in MNIST, fast on-line learning and good energy efficiency. This work was summarized to a journal paper in IEEE Transactions on Circuits and Systems-I (TCAS-I), and it was publicated in 2021/3/2 (early access).

This project is my first complete research since I started scientific research, and it helped me develop good research habits and methodologies. Moreover, this work made me clear that in hardware accelerators, both architecture and low-level computation circuits are worthy to be studied and explored. All in all, this project allowed me to gradually develop the methodology and awareness of systematic thinking, instead of focusing on certain optimization points at the beginning of research. I believe these methods can greatly help my PhD research.

Jiajun Wu
Jiajun Wu
PhD Student

My research interests include Hardware accelerator, reconfigurable computing and computer architecture.

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